STM32WB55RG Ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz, Cortex-M0+ 32MHz with 1 Mbyte of Flash memory, Bluetooth LE 5.0, 802.15.4, Zigbee, Thread, USB, LCD, AES-256

STM32WB55RG Ultra-low-power dual core Arm Cortex-M4 MCU 64 MHz, Cortex-M0+ 32MHz with 1 Mbyte of Flash memory, Bluetooth LE 5.0, 802.15.4, Zigbee, Thread, USB, LCD, AES-256

The STM32WB55xx and STM32WB35xx multiprotocol wireless and ultra-low-power devices embed a powerful and ultra-low-power radio compliant with the Bluetooth^® Low Energy SIG specification v5.0 and with IEEE 802.15.4-2011. They contain a dedicated Arm^® Cortex^® -M0+ for performing all the real-time low layer operation.

The devices are designed to be extremely low-power and are based on the high-performance Arm^® Cortex^®-M4 32-bit RISC core operating at a frequency of up to 64 MHz. The Cortex^®-M4 core features a Floating point unit (FPU) single precision that supports all Arm^® single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) that enhances application security.
Enhanced inter-processor communication is provided by the IPCC with six bidirectional channels. The HSEM provides hardware semaphores used to share common resources between the two processors.
The devices embed high-speed memories (up to 1 Mbyte of Flash memory for STM32WB55xx, up to 512 Kbytes for STM32WB35xx, up to 256 Kbytes of SRAM for STM32WB55xx, 96 Kbytes for STM32WB35xx), a Quad-SPI Flash memory interface (available on all packages) and an extensive range of enhanced I/Os and peripherals.
Direct data transfer between memory and peripherals and from memory to memory is supported by fourteen DMA channels with a full flexible channel mapping by the DMAMUX peripheral.
The devices feature several mechanisms for embedded Flash memory and SRAM: readout protection, write protection and proprietary code readout protection. Portions of the memory can be secured for Cortex^® -M0+ exclusive access.
The two AES encryption engines, PKA and RNG enable lower layer MAC and upper layer cryptography. A customer key storage feature may be used to keep the keys hidden.
The devices offer a fast 12-bit ADC and two ultra-low-power comparators associated with a high accuracy reference voltage generator.
These devices embed a low-power RTC, one advanced 16-bit timer, one general-purpose32-bit timer, two general-purpose 16-bit timers, and two 16-bit low-power timers.
In addition, up to 18 capacitive sensing channels are available for STM32WB55xx (not on UFQFPN48 package). The STM32WB55xx also embed an integrated LCD driver up to 8x40 or 4x44, with internal step-up converter.
The STM32WB55xx and STM32WB35xx also feature standard and advanced communication interfaces, namely one USART (ISO 7816, IrDA, Modbus and Smartcard mode), one low- power UART (LPUART), two I2Cs (SMBus/PMBus), two SPIs (one for STM32WB35xx) up to 32 MHz, one serial audio interface (SAI) with two channels and three PDMs, one USB 2.0 FS device with embedded crystal-less oscillator, supporting BCD and LPM and one Quad-SPI with execute-in-place (XIP) capability.
The STM32WB55xx and STM32WB35xx operate in the -40 to +105 °C (+125 °C junction) and -40 to +85 °C (+105 °C junction) temperature ranges from a 1.71 to 3.6 V power supply. A comprehensive set of power-saving modes enables the design of low-power applications.
The devices include independent power supplies for analog input for ADC.
The STM32WB55xx and STM32WB35xx integrate a high efficiency SMPS step-down converter with automatic bypass mode capability when the V_DD falls below V_BORx (x=1, 2, 3, 4) voltage level (default is 2.0 V). It includes independent power supplies for analog input for ADC and comparators, as well as a 3.3 V dedicated supply input for USB.
A V_BAT dedicated supply allows the devices to back up the LSE 32.768 KHz oscillator, the RTC and the backup registers, thus enabling the STM32WB55xx and STM32WB35xx to supply these functions even if the main V_DD is not present through a CR2032-like battery, a Supercap or a small rechargeable battery.
The STM32WB55xx offer four packages, from 48 to 129 pins. The STM32WB35xx offer one package, 48 pins.

KEY FEATURES

• Includes ST state-of-the-art patented technology
• Radio
  • 2.4 GHz
  • RF transceiver supporting Bluetooth^® 5 specification, IEEE 802.15.4-2011 PHY and MAC, supporting Thread and Zigbee^® 3.0
  • RX sensitivity: -96 dBm (Bluetooth^® Low Energy at 1 Mbps), -100 dBm (802.15.4)
  • Programmable output power up to +6 dBm with 1 dB steps
  • Integrated balun to reduce BOM
  • Support for 2 Mbps
  • Dedicated Arm^® 32-bit Cortex^® M0 + CPU for real-time Radio layer
  • Accurate RSSI to enable power control
  • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
  • Support for external PA
  • Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB55-01E3 or MLPF-WB55-02E3)
• Ultra-low-power platform
  • 1.71 to 3.6 V power supply
  • – 40 °C to 85 / 105 °C temperature ranges
  • 13 nA shutdown mode
  • 600 nA Standby mode + RTC + 32 KB RAM
  • 2.1 µA Stop mode + RTC + 256 KB RAM
  • Active-mode MCU: < 53 µA / MHz when RF and SMPS on
  • Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
• Core: Arm^® 32-bit Cortex^®-M4 CPU with FPU, adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state execution from Flash memory, frequency up to 64 MHz, MPU, 80 DMIPS and DSP instructions
• Performance benchmark
  • 1.25 DMIPS/MHz (Drystone 2.1)
  • 219.48 CoreMark^® (3.43 CoreMark/MHz at 64 MHz)
• Energy benckmark
  • 303 ULPMark™ CP score
• Supply and reset management
  • High efficiency embedded SMPSstep-down converter with intelligent bypass mode
  • Ultra-safe, low-power BOR (brownout reset) with five selectable thresholds
  • Ultra-low-power POR/PDR
  • Programmable voltage detector (PVD)
  • V_BAT mode with RTC and backup registers
• Clock sources
  • 32 MHz crystal oscillator with integrated trimming capacitors (Radio and CPU clock)
  • 32 kHz crystal oscillator for RTC (LSE)
  • Internal low-power 32 kHz (±5%) RC (LSI1)
  • Internal low-power 32 kHz (stability ±500 ppm) RC (LSI2)
  • Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25% accuracy)
  • High speed internal 16 MHz factory trimmed RC (±1%)
  • 2x PLL for system clock, USB, SAI and ADC

• Memories
  • Up to 1 MB Flash memory with sector protection (PCROP) against R/W operations, enabling authentic Bluetooth^® Low Energy and 802.15.4 SW stack
  • Up to 256 KB SRAM, including 64 KB with hardware parity check
  • 20x32-bit backup register
  • Boot loader supporting USART, SPI, I2C and USB interfaces
  • OTA (over the air) Bluetooth^® Low Energy and 802.15.4 update
  • Quad SPI memory interface with XIP
• Rich analog peripherals (down to 1.62 V)
  • 12-bit ADC 4.26 Msps, up to 16-bit with hardware oversampling, 200 µA/Msps
  • 2x ultra-low-power comparator
  • Accurate 2.5 V or 2.048 V reference voltage buffered output
• System peripherals
  • Inter processor communication controller (IPCC) for communication with Bluetooth^® Low Energy and 802.15.4
  • HW semaphores for resources sharing between CPUs
  • 2x DMA controllers (7x channels each) supporting ADC, SPI, I2C, USART, QSPI, SAI, AES, timers
  • 1x USART (ISO 7816, IrDA, SPI Master, Modbus and Smartcard mode)
  • 1x LPUART (low power)
  • 2x SPI 32 Mbit/s
  • 2x I2C (SMBus/PMBus)
  • 1x SAI (dual channel high quality audio)
  • 1x USB 2.0 FS device, crystal-less, BCD and LPM
  • Touch sensing controller, up to 18 sensors
  • LCD 8x40 with step-up converter
  • 1x 16-bit, four channels advanced timer
  • 2x 16-bits, two channels timer
  • 1x 32-bits, four channels timer
  • 2x 16-bits ultra-low-power timer
  • 1x independent Systick
  • 1x independent watchdog
  • 1x window watchdog
• Security and ID
  • Secure firmware installation (SFI) for Bluetooth^® Low Energy and 802.15.4 SW stack
  • 3x hardware encryption AES maximum 256-bit for the application, the Bluetooth^® Low Energy and IEEE802.15.4
  • Customer key storage / key manager services
  • HW public key authority (PKA)
  • Cryptographic algorithms: RSA, Diffie-Helman, ECC over GF(p)
  • True random number generator (RNG)
  • Sector protection against R/W operation (PCROP)
  • CRC calculation unit
  • Die information: 96-bit unique ID
  • IEEE 64-bit unique ID. Possibility to derive 802.15.4 64-bit and Bluetooth^® Low Energy 48-bit EUI
• Up to 72 fast I/Os, 70 of them 5 V-tolerant
• Development support
  • Serial wire debug (SWD), JTAG for the Application processor
  • Application cross trigger with input / output
  • Embedded Trace Macrocell™ for application
• All packages are ECOPACK2 compliant